An electronic circuit may comprise a processing circuit for processing one or more control signals. The control signals may be for example different clock signals. One clock can be a slow clock and another clock can be a fast clock. If the control signal processing circuit is a clock processing circuit, it may include functions related to clock selection, synchronization, timing signal generation and frequency division. This kind of circuit, with a central processing unit (CPU) and peripherals, may be for example used for watch applications, where the slow clock may be used for timing reference, whereas the fast clock may be used to clock peripheral components of the watch.
Many electronic circuits can operate at least in a first power mode, e.g. a high power mode, and in a second power mode, such as a reduced power mode in order to reduce energy consumption. For instance, the reduced power mode may be used when the processing circuit processes a slow frequency clock signal, whereas the circuit may operate in a high power mode when the processing circuit processes a fast clock signal. In electronic circuits which are known in the prior art, some of the components of the control signal processing circuit have a reduced power mode, but certain components cannot be put into a sleep mode, in which the dynamic power consumption would be zero, because they generate signals which are essential to the functioning of the device in which they are present. This is disadvantageous, because the power consumption in this case cannot be reduced to a minimum. For instance, in the case of a prior art clock signal processing circuit, a clock source selection unit and frequency dividers cannot be put into a sleep mode, in which the dynamic power consumption of these elements would be zero, because the clock signals are essential to the functioning of the device in which they are used.